25 Ağustos 2007 Cumartesi

PLC controller

Architecture of specific PLC controller

Introduction
4.1 Why OMRON?
4.2 CPM1A PLC controller
4.3 PLC controller input lines
4.4 PLC controller output lines
4.5 How PLC controller works
4.6 CPM1A PLC controller memory map
4.7 Timers and counters


Introduction

This book could deal with a general overview of some supposed PLC controller. Author has had an opportunity to look over plenty of books published up till now, and this approach is not the most suitable to the purposes of this book in his opinion. Idea of this book is to work through one specific PLC controller where someone can get a real feeling on this subject and its weight. Our desire was to write a book based on whose reading you can earn some money. After all, money is the end goal of every business!

4.1 Why OMRON?

Why not? It is a huge company which has high quality and by our standards inexpensive controllers. Today we can say almost with surety that PLC controllers by manufacturers round the world are excellent devices, and altogether similar. Nevertheless, for specific application we need to know specific information about a PLC controller being used. Therefore, the choice fell on OMRON company and its PLC of micro class CPM1A. Adjective "micro" itself implies the smallest models from the viewpoint of a number of attached lines or possible options. Still, this PLC controller is ideal for the purposes of this book, and that is to introduce a PLC controller philosophy to its readers.

4.2 CPM1A PLC controller

Each PLC is basically a microcontroller system (CPU of PLC controller is based on one of the microcontrollers, and in more recent times on one of the PC processors) with peripherals that can be digital inputs, digital outputs or relays as in our case. However, this is not an "ordinary" microcontroller system. Large teams have worked on it, and a checkup of its function has been performed in real world under all possible circumstances. Software itself is entirely different from assemblers used thus far, such as BASIC or C. This specialized software is called "ladder" (name came about by an association of program's configuration which resembles a ladder, and from the way program is written out).

Specific look of CPM1A PLC controller can be seen in the following picture. On the upper surface, there are 4 LED indicators and a connection port with an RS232 module which is interface to a PC computer. Aside from this, screw terminals and light indicators of activity of each input or output are visible on upper and lower sides. Screw terminals serve to manually connect to a real system. Hookups L1 and L2 serve as supply which is 220V~ in this case. PLC controllers that work on power grid voltage usually have a source of direct supply of 24 VDC for supplying sensors and such (with a CPM1A source of direct supply is found on the bottom left hand side and is represented with two screw terminals. Controller can be mounted to industrial "track" along with other automated elements, but also by a screw to the machine wall or control panel.

Controller is 8cm high and divided vertically into two areas: a lower one with a converter of 220V~ at 24VDC and other voltages needed for running a CPU unit; and, upper area with a CPU and memory, relays and digital inputs.
When you lift the small plastic cover you'll see a connector to which an RS232 module is hooked up for serial interface with a computer. This module is used when programming a PLC controller to change programs or execution follow-up. When installing a PLC it isn't necessary to install this module, but it is recommended because of possible changes in software during operation.
better inform programmers on PLC controller status, maker has provided for four light indicators in the form of LED's. Beside these indicators, there are status indicators for each individual input and output. These LED's are found by the screw terminals and with their status are showing input or output state. If input/output is active, diode is lit and vice versa.


4.3 PLC controller output lines

Aside from transistor outputs in PNP and NPN connections, PLC can also have relays as outputs. Existence of relays as outputs makes it easier to connect with external devices. Model CPM1A contains exactly these relays as outputs. There a 4 relays whose functional contacts are taken out on a PLC controller housing in the form of screw terminals. In reality this looks as in picture below.


4.4 PLC controller input lines

Different sensors, keys, switches and other elements that can change status of a joined bit at PLC input can be hooked up to the PLC controller inputs. In order to realize a change, we need a voltage source to incite an input. The simplest possible input would be a common key. As CPM1A PLC has a source of direct voltage of 24V, the same source can be used to incite input (problem with this source is its maximum current which it can give continually and which in our case amounts to 0.2A). Since inputs to a PLC are not big consumers (unlike some sensor where a stronger external supply must be used) it is possible to take advantage of the existing source of direct supply to incite all six keys.


4.5 How PLC controller works

Basis of a PLC function is continual scanning of a program. Under scanning we mean running through all conditions within a guaranteed period. Scanning process has three basic steps:

Step 1.
Testing input status. First, a PLC checks each of the inputs with intention to see which one of them has status ON or OFF. In other words, it checks whether a sensor, or a switch etc. connected with an input is activated or not. Information that processor thus obtains through this step is stored in memory in order to be used in the following step.

Step 2.
Program execution. Here a PLC executes a program, instruction by instruction. Based on a program and based on the status of that input as obtained in the preceding step, an appropriate action is taken. This reaction can be defined as activation of a certain output, or results can be put off and stored in memory to be retrieved later in the following step.

Step 3.
Checkup and correction of output status. Finally, a PLC checks up output status and adjusts it as needed. Change is performed based on the input status that had been read during the first step, and based on the results of program execution in step two. Following the execution of step 3 PLC returns to the beginning of this cycle and continually repeats these steps. Scanning time is defined by the time needed to perform these three steps, and sometimes it is an important program feature.
4.6 CPM1A PLC controller memory map

By memory map we mean memory structure for a PLC controller. Simply said, certain parts of memory have specific roles. If you look at the picture below, you can see that memory for CPM1A is structured into 16-bit words. A cluster of several such words makes up a region. All the regions make up the memory for a PLC controller.

Unlike microcontroller systems where only some memory locations have had their purpose clearly defined (ex. register that contains counter value), a memory of PLC controller is completely defined, and more importantly almost entire memory is addressable in bits. Addressability in bits means that it is enough to write the address of the memory location and a number of bits after it in order to manipulate with it. In short, that would mean that something like this could be written: "201.7=1" which would clearly indicate a word 201 and its bit 7 which is set to one.

IR region

Memory locations intended for PLC input and output. Some bits are directly connected to PLC controller inputs and outputs (screw terminal). In our case, we have 6 input lines at address IR000. One bit corresponds to each line, so the first line has the address IR000.0, and the sixth IR000.5. When you obtain a signal at the input, this immediately affects the status of a corresponding bit. There are also words with work bits in this region, and these work bits are used in a program as flags or certain conditional bits.

SR region

Special memory region for control bits and flags. It is intended first and foremost for counters and interrupts. For example, SR250 is memory location which contains an adjustable value, adjusted by potentiometer no.0 (in other words, value of this location can be adjusted manually by turning a potentiometer no.0.

TR region

When you move to a subprogram during program execution, all relevant data is stored in this region up to the return from a subprogram.

HR region

It is of great importance to keep certain information even when supply stops. This part of the memory is battery supported, so even when supply has stopped it will keep all data found therein before supply stopped.

AR region

This is one more region with control bits and flags. This region contains information on PLC status, errors, system time, and the like. Like HR region, this one is also battery supported.

LR region

In case of connection with another PLC, this region is used for exchange of data.

Timer and counter region

This region contains timer and counter values. There are 128 values. Since we will consider examples with timers and counters, we will discus this region more later on.

DM region

Contains data related to setting up communication with a PC computer, and data on errors.

Each region can be broken down to single words and meanings of its bits. In order to keep the clarity of the book, this part is dealt with in Attachments and we will deal with those regions here whose bits are mostly used for writing.

.7 Timers and counters

Timers and counters are indispensable in PLC programming. Industry has to number its products, determine a needed action in time, etc. Timing functions is very important, and cycle periods are critical in many processes.

There are two types of timers delay-off and delay-on. First is late with turn off and the other runs late in turning on in relation to a signal that activated timers. Example of a delay-off timer would be staircase lighting. Following its activation, it simply turns off after few minutes.

Each timer has a time basis, or more precisely has several timer basis. Typical values are: 1 second, 0.1 second, and 0,01 second. If programmer has entered .1 as time basis and 50 as a number for delay increase, timer will have a delay of 5 seconds (50 x 0.1 second = 5 seconds).

Timers also have to have value SV set in advance. Value set in advance or ahead of time is a number of increments that timer has to calculate before it changes the output status. Values set in advance can be constants or variables. If a variable is used, timer will use a real time value of the variable to determine a delay. This enables delays to vary depending on the conditions during function. Example is a system that has produced two different products, each requiring different timing during process itself. Product A requires a period of 10 seconds, so number 10 would be assigned to the variable. When product B appears, a variable can change value to what is required by product B.

Typically, timers have two inputs. First is timer enable, or conditional input (when this input is activated, timer will start counting). Second input is a reset input. This input has to be in OFF status in order for a timer to be active, or the whole function would be repeated over again. Some PLC models require this input to be low for a timer to be active, other makers require high status (all of them function in the same way basically). However, if reset line changes status, timer erases accumulated value.

With a PLC controller by Omron there are two types of timers: TIM and TIMH. TIM timer measures in increments of 0.1 seconds. It can measure from 0 to 999.9 seconds with precision of 0.1 seconds more or less.

Quick timer (TIMH) measures in increments of 0.01 seconds. Both timers are "delay-on" timers of a lessening-style. They require assignment of a timer number and a set value (SV). When SV runs out, timer output turns on. Numbers of a timing counter refer to specific address in memory and must not be duplicated (same number can not be used for a timer and a counter).
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Cascode stage
or “collector follower”
Jean-Paul Brodier
All microprocessors from the 8051 family have inputs and outputs that are ‘quasi-bidirectional’. This means that when power is first applied, the ports behave as inputs with a logic high level and a weak pull-up.,

Glitch
a relay or some other load such as When driving an optocou-pler or LED, there is a problem
at power on: the NPN transistor in the common emitter connec­tion (Figure 1) causes an unde­sirable excitation of the load from the moment power is applied until the microprocessor has had the chance to turn the output low. In addition, logic high outputs are seldom able to deliver enough current to drive the transistor into saturation because they have been designed to be active low.
Figure 1. An NPN transistor drives a load.
To solve both of these problems in one hit, we have to make the active level logic low. This can be done in three different ways: use an emitter follower as a buffer stage (Figure 2a), an inverter in a common emit­ter circuit (Figure 2b) or an inverter/open collector circuit (Figure 2c). The disadvantage of solution 2a is the fact that the voltage to the load is reduced. In the case of a relay with a 5-V coil there is the risk that the resulting voltage is too low. The disadvantage of examples 2b and 2c is that they require more parts.
Collector follower
That leaves the open collector buffer in the form of an IC type 7404. This solution, however, also has a few disadvantages. You do not always need all of the 6 buffers in one IC. Also, the SMD version can only handle 12 V. This is too low and dan­gerous if we happen to supply the load from an unregulated voltage.
The solution presented here com­bines in one transistor the advan­tages of the emitter follower (inactive when power is first applied) and open collector (higher power supply voltage, lower current). This circuit has been known since the valve era by the name cascode (drive via the cathode). The goal was to reduce the Miller-effect of the internal (parasitic) capacitances. Not having the option of reduc­ing the capacitance between the internal electrodes, a lower volt­age was used instead. The cas-code circuit is often used in pow­erful transmitters (tens of kW) to minimise the Miller-effect. This circuit was also used to limit tran­sistor conduction and to keep the dissipation within bounds, which increased the life of bipolar tran­sistors. This was in the IGBT and VMOS era.
The transistor conducts only when the output from the micro­processor is low (refer Fig­ure 3). The base current is lim­ited by resistor R. This current is determined by the current flow­ing through the load. When the power is switched on, both the base and emitter see the same potential, VCC, so the transistor remains blocked. One thing we have to keep in mind: we may not exceed the current rating of the microprocessor output because it has to cope with all the current flowing in the emitter of the transistor.
In the case of the quite common 80C51, this maximum current is typically 3.2 mA (two LS TTL loads). This is sufficient to drive an LED without overloading the 5-V regulator, or for driving a PNP power stage at the high side (Figure 3b). The parallel Philips PCF88574 I2C interfaces can handle 25 mA. For the Atmel AT89Cx051 as well as for the Philips P89LPC9xx the limit is 20 mA. For the latter type the cascode circuit or ‘collector fol­lower’ is even more interesting when the outputs are configured as open-drain because the nom­inal voltage is only 3.6 V. In all cases we have to make sure that the maximum dissipation of the
Figure 3. Cascode driver stage with discrete transistor.
package is not exceeded. 24 V is sufficient to energise its are determined by the power
Should this be the case, then the half Watt relay coil, which in PNP (or VMOS) transistor.
number of open collectors turn can drive a load of 16 A at The cascode transistor can be a required will probably justify 230V. ‘digital’ type with integrated resorting to a 7404. For loads driven from the positive base and emitter resistors.A current of around 20 mA at side, the voltage and current lim-


pot as interrupt generator

In battery-powered, microcon­troller driven circuits, as well as with microcontrollers operating in cars, it is desirable to switch the micro into power-down mode once a task has been completed. An interrupt request is then required to wake up the micro. This circuit allows an interrupt to be generated in a simple way using a common potentiometer. In the example circuit, the pot may also copy its spindle position to the ADC. This enables the pot to be used for continuously variable settings (like volume) as well for getting the micro out of its power-down mode.
IC1A is configured as a differen­tiator with R3 preventing oscillation by keeping the gain down to 10 times. Because the opamp oper­ates off a single-rail supply voltage, an 18k/10k potential divider (R1/R2) is able to create a virtual ground level at +1.75 V. This can be done because the LM358 can handle input levels of up to 3.5 V when supplied at 5.0 volts. IC1A supplies a brief High pulse at a falling input voltage, and a similar Low pulse when the input voltage rises. In order to get a High pulse when the potentiome­ter spindle is turned cw or ccw, IC1B is set up as an inverter. Next, each opamp output drives the base of a BC547 transistor. The 5 V-to-0 V transitions at both collector outputs are shaped and combined into a usable interrupt pulse by three NOR gates IC2A, IC2B and IC2C.If the potentiometer spindle is turned very slowly, it is possible that the circuit does not respond
That is why an LED has been added that lights briefly when a pulse is generated. Finally, a tip: a 100-pF capacitor may be connected in parallel with R5 for additional suppres­sion of self-oscillation.

elektor time standart


Elektor Time standard (1988)
Jan Buiting

The Elektor Time Standard and associated Slave Unit were spin-offs of another hugely successful project, the DCF77 Receiver / Locked Frequency Standard. The receiver was published in the January 1988 issue, the Time Standard and Slave display in the next two issues. All units were housed in then very fash­ionable and (expensive!) Ver-obox two-part ABS enclosures which had also been used for a number of Elektor test instrument designs published between 1984 and 1987. The Time Standard box was designed to process seconds pulses received from the VLF (77.5 kHz) DCF77 time standard transmitter in Mainflingen, Ger­many, and display time (with atomic accuracy) and date on an LC display. The circuit was based on then extremely popular 8052AH-BASIC microcontroller from Intel, a device, we can safely claim, that made it to fame & glory thanks to Elektor Electron-
ics. The 40-way DIL chip con­tained a BASIC interpreter capa­ble of executing ‘tokenised’ code from an external EPROM. This, we were told by our resident designer Peter Theunissen, made writing the DCF77 time signal decoding routines ‘a doddle’ using his specially adapted BASIC computer and interpreter. For example, when concerns were raised (by myself) that not all of Europe was in the time zone served by DCF77 (i.e., CET or GMT+1h), a menu option was quickly added to allow users to select between UTC and GMT+1h. As a relative novelty, a ready-made self-adhesive front panel foil with built-in membrane keys was designed into the proj­ect. This expensive item had been produced specially for Elektor. However, when the article went into print (using a rather glum page layout and black & white print), there were yet other con­cerns regarding the range of the DCF77 transmitter. This is offi­cially claimed as “approximately 1,000 km by groundwave propa-

gation”. A quick use of a com­pass and a map of Europe sug­gested that the signal would only cover the south-eastern part of the UK, possibly including Greater London. For a couple of months we waited with baited breath for readers’ responses, only to receive two enthusiastic reception reports, one from the East coast of Ireland and another from Riyadh, Saudi Arabia! The latter report came from a reader work­ing at a chemical laboratory. I remember he wrote that DCF77 could be received for a few min­utes a day only, synchronising the clock, usually around nightfall despite heavy ‘static’. A huge wire antenna was used (nothing like the 1-inch ferrite rods we used in our lab, which is less than 100 km away from Mainflingen). Although the BASIC program list-
ing for the Time Standard was freely distributed to interested readers (on paper, in an enve­lope, by snail mail!), only very advanced readers were able to compile the program into tokenised code and burn it into an EPROM. Most other readers had to rely on a ready-pro­grammed 27C64 supplied through our Readers Services. Apart from displaying time and date at atomic accuracy, the Time Standard was also capable of outputting time/date information

in the form of ASCII character strings for other (intelligent) equip­ment to use, for example, a timer or switching clock. Although sales figures of the PCB and EPROM were in the hundreds, I never heard from anyone actually hav­ing enjoyed the wonders of the ASCII output so extensively described in the article. The Slave unit published in March 1988 was connected to the Time Standard via screened (micro­phone) cable, the idea being that one or more Slave units could be installed on walls in rooms at some distance from the main clock unit. Central timekeeping deluxe for offices, labs, schools and workshops, but at what an expense and design effort! Not too many PCBs were sold for this extension of the Time Standard.