29 Ekim 2007 Pazartesi

Pseudo-coherent Radar



A requirement for any Doppler radar is cohenrence; that is, some definite phase relationship must exist between the transmitted frequency and the reference frequency, which is used to detect the Doppler shift of the receiver signal. Moving objects are detected by the phase difference between the target signal and background clutter and noise components. Phase detection of this type relies on coherence between the transmitter frequency and the receiver reference frequency.

If the transmitter output stage is a self oscillating device, the pulse to pulse phase is random on transmission. In coherent detection, a stable cw reference oscillator signal, which is locked in phase with the transmitter during each transmitted pulse, is mixed with the echo signal to produce a beat or difference signal. Since the reference oscillator and the transmitter are locked in phase, the echoes are effectively compared with the transmitter in frequency and phase. This phase reference must be maintained from the transmitted pulse to the return pulse picked up by the receiver.

Pseudo-coherent Radar sets are sometimes called: „coherent-on-receive”

Duplexer
The duplexer alternately switches the antenna between the transmitter and receiver so that only one antenna need be used. This switching is necessary because the high-power pulses of the transmitter would destroy the receiver if energy were allowed to enter the receiver.

Mixer Stage
The function of the mixer stage is to convert the received rf energy to a lower, intermediate frequency (IF) that is easier to amplify and manipulate electronically. The intermediate frequency is usually 30 op to 74 megahertz. It is obtained by heterodyning the received signal with a local-oscillator signal in the mixer stage. The mixer stage converts the received signal to the lower IF signal without distorting the data on the received signal.

IF-Amplifier
After conversion to the intermediate frequency, the signal is amplified in several IF-amplifier stages. Most of the gain of the receiver is developed in the IF-amplifier stages. The overall bandwidth of the receiver is often determined by the bandwidth of the IF-stages.

Automatic Frequency Control
As in all superheterodyne receivers, controlling the frequency of the local oscillator keeps the receiver tuned. Since this tuning is critical, some form of automatic frequency control (afc) is essential to avoid constant manual tuning. Automatic frequency control circuits mix an attenuated portion of the transmitted signal with the local oscillator signal to form an IF signal. This signal is applied to a frequency-sensitive discriminator that produces an output voltage proportional in amplitude and polarity to any change in IF-frequency. If the IF signal is at the discriminator center frequency, no discriminator output occurs. The center frequency of the discriminator is essentially a reference frequency for the IF-signal.

The output of the discriminator provides a control voltage to maintain the local oscillator at the correct frequency.

Stable Local Oscillator
As the receiver is normally a super heterodyne, a stable local oscillator known as the StaLO down converts the signal to intermediate frequency.

Most radar receivers use a 30 up to 74 megahertz intermediate frequency. The IF is produced by mixing a local oscillator signal with the incoming signal. The local oscillator is, therefore, essential to efficient operation and must be both tunable and very stable. For example, if the local oscillator frequency is 3,000 megahertz, a frequency change of 0.1 percent will produce a frequency shift of 3 megahertz. This is equal to the bandwidth of most receivers and would greatly decrease receiver gain.

The power output requirement for most local oscillators is small (20 to 50 milliwatts) because most receivers use crystal mixers that require very little power.

The local oscillator output frequency must be tunable over a range of several megahertz in the 4,000-megahertz region. The local oscillator must compensate for any changes in the transmitted frequency and maintain a constant 30 up to 74 megahertz difference between the oscillator and the transmitter frequency. A local oscillator that can be tuned by varying the applied voltage is most desirable.

Phase-sensitive Detector
The IF-signal is passed to a phase sensitive detector (PSD) which converts the signal to base band, while faithfully retaining the full phase and quadrature information of the Doppler signal. This means, the phase-sensitive detector produces a video signal. The amplitude of the video signal is determined by the phase difference between the coho reference signal and the IF echo signals. This phase difference is the same as that between the actual transmitted pulse and its echo. The resultant video signal may be either positive or negative.

Signal Processor
The signal processor is that part of the system which separates targets from clutter on the basis of Doppler content and amplitude characteristics.

Directional Coupler
The directional coupler provides a sample of the transmitter output on every pulse. This signal adjusts the STALO frequency via the AFC but more importantly, it adjusts the phase of the COHO, locking it to the phase reference from the magnetron. The phase synchronization of the COHO by means of a sample of the magnetron output is mandatory because there is no phase correlation between two successive RF pulses of the magnetron.

Mixer Stage
The function of this mixer stage is to convert the sample of the transmitter output to the intermediate frequency. This coho lock pulse synchronize the coho to a fixed phase relationship with the transmitted frequency at each transmitted pulse.

Coherent Oscillator
The second local oscillator known as the coherent oscillator (COHO) enables the down conversion process into the phase sensitive detector, whilst maintaining an accurate phase reference. The coho lock pulse is originated by the transmitted pulse. It is used to synchronize the coho to a fixed phase relationship with the transmitted frequency at each transmitted pulse.

The COHO takes over the phase of the transmitter tube and provides it to the receiver part of the system. This is the reason why the pseudo-coherent radar is also called „coherent on receive”.

Modulator
The oscillator tube of the transmitter is keyed by a high-power dc pulse of energy generated by this separate unit called the modulator.

Disadvantages of the pseudo-coherent radar
The pseudo-coherent radar is a retired one today, but some older radar sets are still operational. The disadvantages of the pseudo-coherent radar can be summarised as follows:

The phase locking process is not as accurate as a fully coherent system, which reduces the MTI Improvement factor.
This technique cannot be applied to a frequency agile radar. Frequency change in a magnetron relies on the mechanical tuning of a cavity and it is essentially a narrow band device.
It is not flexible and cannot easily accommodate changes in the PRF, pulsewidth or other parameters of the transmitted signal. Such changes are straightforward in a fully coherent radar because they can be performed at low level. It is also impossible to perform FM modulation (which is mandatory for a pulse compression radar) with this type of system.
Second time around echoes are returns from large fixed clutter areas located a long distance from the radar. Because they originate from a large distance, such echoes are returned after a second magnetron pulse has been transmitted. However, they pertain to the first pulse transmitted by the magnetron. Such echoes are range ambiguous but, in addition, second time around clutter will not cancel. This is due to the fact that the phase locking of the COHO applies only to the last transmitted pulse.
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Cascode stage
or “collector follower”
Jean-Paul Brodier
All microprocessors from the 8051 family have inputs and outputs that are ‘quasi-bidirectional’. This means that when power is first applied, the ports behave as inputs with a logic high level and a weak pull-up.,

Glitch
a relay or some other load such as When driving an optocou-pler or LED, there is a problem
at power on: the NPN transistor in the common emitter connec­tion (Figure 1) causes an unde­sirable excitation of the load from the moment power is applied until the microprocessor has had the chance to turn the output low. In addition, logic high outputs are seldom able to deliver enough current to drive the transistor into saturation because they have been designed to be active low.
Figure 1. An NPN transistor drives a load.
To solve both of these problems in one hit, we have to make the active level logic low. This can be done in three different ways: use an emitter follower as a buffer stage (Figure 2a), an inverter in a common emit­ter circuit (Figure 2b) or an inverter/open collector circuit (Figure 2c). The disadvantage of solution 2a is the fact that the voltage to the load is reduced. In the case of a relay with a 5-V coil there is the risk that the resulting voltage is too low. The disadvantage of examples 2b and 2c is that they require more parts.
Collector follower
That leaves the open collector buffer in the form of an IC type 7404. This solution, however, also has a few disadvantages. You do not always need all of the 6 buffers in one IC. Also, the SMD version can only handle 12 V. This is too low and dan­gerous if we happen to supply the load from an unregulated voltage.
The solution presented here com­bines in one transistor the advan­tages of the emitter follower (inactive when power is first applied) and open collector (higher power supply voltage, lower current). This circuit has been known since the valve era by the name cascode (drive via the cathode). The goal was to reduce the Miller-effect of the internal (parasitic) capacitances. Not having the option of reduc­ing the capacitance between the internal electrodes, a lower volt­age was used instead. The cas-code circuit is often used in pow­erful transmitters (tens of kW) to minimise the Miller-effect. This circuit was also used to limit tran­sistor conduction and to keep the dissipation within bounds, which increased the life of bipolar tran­sistors. This was in the IGBT and VMOS era.
The transistor conducts only when the output from the micro­processor is low (refer Fig­ure 3). The base current is lim­ited by resistor R. This current is determined by the current flow­ing through the load. When the power is switched on, both the base and emitter see the same potential, VCC, so the transistor remains blocked. One thing we have to keep in mind: we may not exceed the current rating of the microprocessor output because it has to cope with all the current flowing in the emitter of the transistor.
In the case of the quite common 80C51, this maximum current is typically 3.2 mA (two LS TTL loads). This is sufficient to drive an LED without overloading the 5-V regulator, or for driving a PNP power stage at the high side (Figure 3b). The parallel Philips PCF88574 I2C interfaces can handle 25 mA. For the Atmel AT89Cx051 as well as for the Philips P89LPC9xx the limit is 20 mA. For the latter type the cascode circuit or ‘collector fol­lower’ is even more interesting when the outputs are configured as open-drain because the nom­inal voltage is only 3.6 V. In all cases we have to make sure that the maximum dissipation of the
Figure 3. Cascode driver stage with discrete transistor.
package is not exceeded. 24 V is sufficient to energise its are determined by the power
Should this be the case, then the half Watt relay coil, which in PNP (or VMOS) transistor.
number of open collectors turn can drive a load of 16 A at The cascode transistor can be a required will probably justify 230V. ‘digital’ type with integrated resorting to a 7404. For loads driven from the positive base and emitter resistors.A current of around 20 mA at side, the voltage and current lim-


pot as interrupt generator

In battery-powered, microcon­troller driven circuits, as well as with microcontrollers operating in cars, it is desirable to switch the micro into power-down mode once a task has been completed. An interrupt request is then required to wake up the micro. This circuit allows an interrupt to be generated in a simple way using a common potentiometer. In the example circuit, the pot may also copy its spindle position to the ADC. This enables the pot to be used for continuously variable settings (like volume) as well for getting the micro out of its power-down mode.
IC1A is configured as a differen­tiator with R3 preventing oscillation by keeping the gain down to 10 times. Because the opamp oper­ates off a single-rail supply voltage, an 18k/10k potential divider (R1/R2) is able to create a virtual ground level at +1.75 V. This can be done because the LM358 can handle input levels of up to 3.5 V when supplied at 5.0 volts. IC1A supplies a brief High pulse at a falling input voltage, and a similar Low pulse when the input voltage rises. In order to get a High pulse when the potentiome­ter spindle is turned cw or ccw, IC1B is set up as an inverter. Next, each opamp output drives the base of a BC547 transistor. The 5 V-to-0 V transitions at both collector outputs are shaped and combined into a usable interrupt pulse by three NOR gates IC2A, IC2B and IC2C.If the potentiometer spindle is turned very slowly, it is possible that the circuit does not respond
That is why an LED has been added that lights briefly when a pulse is generated. Finally, a tip: a 100-pF capacitor may be connected in parallel with R5 for additional suppres­sion of self-oscillation.

elektor time standart


Elektor Time standard (1988)
Jan Buiting

The Elektor Time Standard and associated Slave Unit were spin-offs of another hugely successful project, the DCF77 Receiver / Locked Frequency Standard. The receiver was published in the January 1988 issue, the Time Standard and Slave display in the next two issues. All units were housed in then very fash­ionable and (expensive!) Ver-obox two-part ABS enclosures which had also been used for a number of Elektor test instrument designs published between 1984 and 1987. The Time Standard box was designed to process seconds pulses received from the VLF (77.5 kHz) DCF77 time standard transmitter in Mainflingen, Ger­many, and display time (with atomic accuracy) and date on an LC display. The circuit was based on then extremely popular 8052AH-BASIC microcontroller from Intel, a device, we can safely claim, that made it to fame & glory thanks to Elektor Electron-
ics. The 40-way DIL chip con­tained a BASIC interpreter capa­ble of executing ‘tokenised’ code from an external EPROM. This, we were told by our resident designer Peter Theunissen, made writing the DCF77 time signal decoding routines ‘a doddle’ using his specially adapted BASIC computer and interpreter. For example, when concerns were raised (by myself) that not all of Europe was in the time zone served by DCF77 (i.e., CET or GMT+1h), a menu option was quickly added to allow users to select between UTC and GMT+1h. As a relative novelty, a ready-made self-adhesive front panel foil with built-in membrane keys was designed into the proj­ect. This expensive item had been produced specially for Elektor. However, when the article went into print (using a rather glum page layout and black & white print), there were yet other con­cerns regarding the range of the DCF77 transmitter. This is offi­cially claimed as “approximately 1,000 km by groundwave propa-

gation”. A quick use of a com­pass and a map of Europe sug­gested that the signal would only cover the south-eastern part of the UK, possibly including Greater London. For a couple of months we waited with baited breath for readers’ responses, only to receive two enthusiastic reception reports, one from the East coast of Ireland and another from Riyadh, Saudi Arabia! The latter report came from a reader work­ing at a chemical laboratory. I remember he wrote that DCF77 could be received for a few min­utes a day only, synchronising the clock, usually around nightfall despite heavy ‘static’. A huge wire antenna was used (nothing like the 1-inch ferrite rods we used in our lab, which is less than 100 km away from Mainflingen). Although the BASIC program list-
ing for the Time Standard was freely distributed to interested readers (on paper, in an enve­lope, by snail mail!), only very advanced readers were able to compile the program into tokenised code and burn it into an EPROM. Most other readers had to rely on a ready-pro­grammed 27C64 supplied through our Readers Services. Apart from displaying time and date at atomic accuracy, the Time Standard was also capable of outputting time/date information

in the form of ASCII character strings for other (intelligent) equip­ment to use, for example, a timer or switching clock. Although sales figures of the PCB and EPROM were in the hundreds, I never heard from anyone actually hav­ing enjoyed the wonders of the ASCII output so extensively described in the article. The Slave unit published in March 1988 was connected to the Time Standard via screened (micro­phone) cable, the idea being that one or more Slave units could be installed on walls in rooms at some distance from the main clock unit. Central timekeeping deluxe for offices, labs, schools and workshops, but at what an expense and design effort! Not too many PCBs were sold for this extension of the Time Standard.